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  ? semiconductor components industries, llc, 2006 september, 2006 ? rev. 0 1 publication order number: NCS6415/d NCS6415 bus?controlled video matrix switch description the main function of the NCS6415 is to switch 8 video input sources to the 6 outputs. each output can be switched to only one of the inputs, whereas any single input may be connected to several outputs. all switching possibilities are controlled through the i 2 c bus. features ? cascadable with another NCS6415 (internal address can be changed by pin 7 voltage) ? 8 inputs (cvbs, rgb, chroma, ...) ? 6 outputs with low impedance driver ? possibility of chroma signal for each input by switching off the clamp with an external resistor bridge ? bus controlled ? 6.5 db gain between any input and output ? ?45 db crosstalk at 5 mhz ? compatible with tea6415c ? full esd protection ? these are pb?free devices marking diagrams * *for additional marking information, refer to application note and8002/d. so?20 wb dw suffix case 751d 1 20 a = assembly location wl = wafer lot yy = year ww = work week g = pb?free package 20 1 NCS6415 awlyywwg http://onsemi.com 17 18 16 15 14 13 12 4 3 5 6 7 8 9 11 10 19 20 2 1 input1 data1 input2 clock input3 input4 prog input5 v cc input6 input8 gnd output6 output5 output4 output3 output2 output1 gnd input7 device package shipping ? ordering information NCS6415dwg so?20 (pb?free) 38 units / rail NCS6415dwr2g so?20 (pb?free) 1000 / tape & ree l ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. 4 .com u datasheet
NCS6415 http://onsemi.com 2 figure 1. block diagram 1 3 5 6 8 10 11 20 18 17 16 15 14 13 12 274919 bus decoder input1 input2 input3 input4 input5 input6 input7 input8 gnd gnd output1 output2 output3 output4 output5 output6 clock prog data v cc the main function of the NCS6415 is to switch 8 video input sources to the 6 outputs. each output can be switched to only one of the inputs, whereas any single input may be connected to several outputs. the lowest level of each signal is aligned on each input (bottom of sync pulse for cvbs or black level for rgb signals). the nominal gain between any input and output is 6 db. for chroma signals, the alignment is switched off by forcing, with an external 5? vdc resistor bridge on the input. each input can be used as a normal input or as a chroma input (with external resistor bridge). all the switching possibilities are changed through the i 2 c bus. the switches configuration is defined by words of 16 bits: one word of 16 bits for each output channel. so, 6 words of 16 bits are necessary to determine the starting configuration upon poweron (power supply: 0 to 10 v). but a new configuration needs only the words of the changed output channels. driving a 75  load requires an external transistor. 4 .com u datasheet
NCS6415 http://onsemi.com 3 table 1. attributes characteristics value esd human body model machine model 4 kv 400 v moisture sensitivity (note 1) level 3 flammability rating oxygen index: 28 to 34 ul 94 v0 @ 0.125 in. 1. for additional information, see application note and8003/d table 2. maximum ratings parameter symbol rating unit power supply voltage v cc 12 v operating temperature range t a 0 to +70 c storage temperature range t stg 60 to +150 c thermal resistance, junctiontoair so20  ja 30 to 35 c/w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. table 3. dc & ac characteristics (t a = 25 c, v cc = 10 v, r l = 10 k  , c l = 3 pf) symbol parameter min typ max unit v cc supply voltage 8 10 11 v i cc power supply current (no load) 20 30 40 ma inputs signal amplitude (cvbs signal) (note 2) 1.5 2 v pp input current (per output connected, v in = 5 v dc ) 1 3  a dc level 3.3 3.6 3.9 v dc level shift (0 c to 70 c) 5 100 mv r in input resistance 1 m  c in input capacitance 2 pf outputs dynamic (v in = 2.5 v pp ) 5 v pp output impedance (note 2) 25 50  a v gain (note 2) 6 6.5 7 db bw bandwidth (note 2) 1 db attenuation 3 db attenuation 7 15 20 mhz 0.1 db gain flatness (note 2) 6 mhz crosstalk f = 3.58 mhz f = 5 mhz 48 45 db dc level 2.4 2.75 3.1 v i 2 c bus input: data, clock and prog threshold voltage 1.5 2 3 v 2. guaranteed by design and/or characterization. 4 .com u datasheet
NCS6415 http://onsemi.com 4 table 4. i 2 c bus characteristics symbol parameter test conditions min max unit scl v il low level input voltage 0.3 +1.5 v v ih high level input voltage 3.0 v cc +0.5 v i li input leakage current v i = 0 to v cc 10 +10  a f scl clock frequency (note 3) 0 100 khz t r input rise time (note 3) 1.5 v to 3 v 1000 ns t f input fall time (note 3) 3 v to 1.5 v 300 ns c i input capacitance (note 3) 10 pf sda v il low level input voltage 0.3 +1.5 v v ih high level input voltage 3.0 v cc +0.5 v i li input leakage current v i = 0 to v cc 10 +10  a c i input capacitance (note 3) 10 pf t r input rise time (note 3) 1.5 v to 3 v 1000 ns t f input fall time (note 3) 3 v to 1.5 v 300 ns v ol low level output voltage i ol = 3 ma 0.4 v t f output fall time (note 3) 3v to 1.5 v 250 ns c l load capacitance 400 pf timing t low clock low period (note 4) 4.7  s t high clock high period (note 4) 4.0  s t su,dat data setup time (note 4) 250 ns t hd,dat data hold time (note 4) 0 340 ns t su,sto setup time from clock high to stop (note 4) 4.0  s t buf start setup time following a stop (note 4) 4.7  s t hd,sta start hold time (note 4) 4.0  s t su,sta start setup time following clock low to high transition (note 4) 4.7  s 3. guaranteed by design and/or characterization. 4. functionality guaranteed by design and/or characterization. 4 .com u datasheet
NCS6415 http://onsemi.com 5 i 2 c bus selections the i 2 c chip address is defined by the first byte. the second byte defines the input/output configuration. table 5. chip address byte (1 st byte of transmission) hex binary comment 86 1000 0110 when prog pin is connected to ground 06 0000 0110 when prog pin is connected to v cc input/output selection byte (2 nd byte of transmission) table 6. i 2 c bus output selections output address (msb) input address (lsb) selected output 00000 xxx pin 18 output is selected by the 5 msbs. 00100 xxx pin 14 00010 xxx pin 16 00110  not used 00001 xxx pin 17 00101 xxx pin 13 00011 xxx pin 15 00111  not used table 7. i 2 c bus input selections output address (msb) input address (lsb) selected input 00xxx 000 pin 5 input is selected by the 3 lsbs. 00xxx 100 pin 8 00xxx 010 pin 3 00xxx 110 pin 20 00xxx 001 pin 6 00xxx 101 pin 10 00xxx 011 pin 1 00xxx 111 pin 11 example: 0010 0101 (binary) or 25 (hex) connects pin 10 (input) to pin 14 (output) figure 2. i 2 c timing diagram sda scl sda t buf t low t su.dat t su.sto t high t hd.dat t r t hd.sta t su.sta t f 4 .com u datasheet
NCS6415 http://onsemi.com 6 figure 3. input configuration figure 4. output configuration v cc 6 times 0.36 v cc pins 1, 3, 5, 6, 8, 10, 11 and 20 v cc output 11 k  8 npn transistors 14 k  7 k  x 3 pins 1, 3, 5, 6, 8, 10, 11 and 20 figure 5. bus i/o configuration v ref 250  a ack *for pin 2 (data only) 150  20 k  pins 2, 4, and 7 to i 2 l part * figure 6. v cc pin configuration 20 k  150  v cc 4 .com u datasheet
NCS6415 http://onsemi.com 7 using a second NCS6415 the programming input pin (prog) allows two NCS6415 circuits to operate in parallel and to select them independently through the i 2 c bus by modifying the address byte. consequently, the switching capabilities are doubled, or ic1 and ic2 can be cascaded (see figure 7). figure 7. cascaded NCS6415 logical ?0? video inputs logical ?1? video inputs mcu prog ic1 prog ic2 video outputs video outputs NCS6415 NCS6415 typical application diagram NCS6415 is suited for single supply system, running on a single +10 v supply. the high quality of the output stage and excellent linearity provides video signal comparable to broadcast studio quality signals. the layout is not as critical to the design and it can be easily realized on a single sided board. 17 15 data additional video outputs 11 vcr 18 security video interface screen input 1 input 8 8 13 10 20 16 6 clock 5 outpu 1 3 output 6 additional video inputs NCS6415 prog 1 hdtv receiver circuit bus decoder s tv receiver circuit 14 microcontroller figure 8. typical application diagram v cc 4 .com u datasheet
NCS6415 http://onsemi.com 8 4 3 5 6 7 8 9 10 2 1 17 18 16 15 14 13 12 11 19 20 figure 9. typical application circuit input 1 sda input 2 scl input 3 input 4 input 5 input 6 c9 100nf c10 c1 100nf c2 100nf c3 100nf c5 100nf c6 100nf c8 100nf 75  r1 75  r3 75  r5 75  r8 75  r9 r6 75  100  r4 100  r2 input8 gnd output6 output5 output4 output3 output2 gnd input7 output1 input1 data input2 clock input3 input4 prog input5 v cc input6 c12 100nf 75  r42 input 8 c11 100nf r11 75  input 7 r38 470  r37 10k  r41 68  r39 10k  r40 75  +10v +10v +10v +10v +10v +10v r32 10k  r36 68  r35 10k  r35 75  r33 470  r28 470  r27 10k  r31 68  r30 10k  r30 75  r26 68  r24 10k  r25 75  r23 470  r22 10k  r20 75  r21 68  r19 10k  r18 470  r17 10k  r13 10k  r16 68  r14 10k  r12 470  r15 75  output 6 output 5 output 4 output 3 output 2 output 1  f v cc = +10v 4 .com u datasheet
NCS6415 http://onsemi.com 9 package dimensions 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane  h x 45  e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90  0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.  so20 wb case 751d05 issue g on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?t ypicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license un der its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended f or surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in a ny manner. NCS6415/d publication ordering information n. american technical support : 8002829855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81357733850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative 4 .com u datasheet


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